CONFERENCE (56 Papers)
* : 1st Author
56. [S. VLSI 2025] A 55.8-to-64.2GHz, 58.3fsrms-Jitter, -250.2dB-FoMJ Fractional-N Cascaded PLL in 28nm CMOS [paper]
- Author: Jaehong Jung, Eunseok Lee, Donghyeon Han, Jinchen Wang, Anantha P. Chandrakasan and Ruonan Han
- Symposium on VLSI Circuits 2025
55. [ISCAS 2025] A 2.67 mJ/Frame Video Mamba Accelerator with Importance-Aware Redundancy Elimination and SSM Computing Reformulation [paper]
- Author: Youngjin Moon, Sangwoo Ha, Soyeon Kim, Junha Ryu, Hoi-Jun Yoo, and Donghyeon Han
- IEEE International Symposium on Circuits and Systems 2025
54. [ISCAS 2025] A 13.83 TOPS/W Polynomial Implicit Neural Representation Accelerator with Tile Similarity Exploitation and LUT-Based Matrix Multiplication Reformation [paper]
- Author: Minsung Kim, Wonhoon Park, Sanghyuk An, Hoi-Jun Yoo, and Donghyeon Han
- IEEE International Symposium on Circuits and Systems 2025
53. [ISCAS 2025] A 17.1 TOPS/W FP-INT Transformer Inference Accelerator with Sparsity Boosting and Output Importance-Aware Processing [paper]
- Author: Jeonggyu So, Seongyon Hong, Jiwon Choi, Wooyoung Jo, Sangjin Kim, Hoi-Jun Yoo, and Donghyeon Han
- IEEE International Symposium on Circuits and Systems 2025
52. [CICC 2025] A Fully-Integrated Wireless Ingestible Drug Delivery Chip with Electrochemical Energy Harvesting and pH-Based MPPT [paper]
- Author: So-Yoon Yang, Deniz Umut Yildirim, Saransh Sharma, Donghyeon Han, Rishabh Mittal, Husna Ellis, Jaehong Jung, Eunseok Lee, Yubin Cai, Giovanni Traverso, Anantha P. Chandrakasan
- IEEE Custom Integrated Circuits Conference 2025
51. [ISSCC 2025*] MEGA.mini: A Universal Generative AI Processor with a New Big/Little Core Architecture for NPU [paper]
- Author: Donghyeon Han and Anantha P. Chandrakasan
- IEEE International Solid-State Circuits Conference 2025
50. [A-SSCC 2024] LPNA: A 2.75 ms Low-Latency and 0.40 uJ/point Energy-Efficient LiDAR Point-Cloud Neural Network Accelerator with Cylindrical Bin Partitioning [paper]
- Author: Bokyoung Seo, Jueun Jung, Donghyeon Han, Kyuho Jason Lee
- IEEE Asian Solid-State Circuits Conference 2024
49. [ISLPED 2024] An Energy-Efficient 3D Point Neural Network Accelerator with Fine-grained LiDAR-SoC Pipeline Structure [paper]
- Author: Bokyoung Seo, Jueun Jung, Donghyeon Han, and Kyuho Jason Lee
- ACM/IEEE International Symposium on Low Power Electronics and Design 2024
48. [HotChips 2024] LSPU: A 20.7ms Low-latency POint Neural Network-based 3D Perception and Semantic LiDAR SLAM System-on-Chip for Autonomous Driving System [paper]
- Author: Jueun Jung, Seungbin Kim, Bokyoung Seo, Wuyoung Jang, Sangho Lee, Jeongmin Shin, Donghyeon Han, and Kyuho Jason Lee
- IEEE Hot Chips: A Symposium on High Performance Chips 2024
47. [HotChips 2024] NeuGPU: A Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering for Mobile AR/VR Devices [paper]
- Author: Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2024
46. [HotChips 2024] Space-Mate: A 303.5mW Real-Time NeRF SLAM Processor with Sparse Mixture-of-Experts-based Acceleration [paper]
- Author: Gwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2024
45. [CoolChips 2024] A Low-power and Real-time Neural-Rendering Dense SLAM Processor with 3-Level Hierarchical Sparsity Exploitation [paper]
- Author: Gwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 27) 2024
44. [CoolChips 2024] A Low-Power Neural Graphics System for Instant 3D Modeling and Real-Time Rendering on Mobile AR/VR Devices [paper]
- Author: Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 27) 2024
43. [CoolChips 2024] A Low-power and Real-time Semantic LiDAR-SLAM Processor with Point Neural Netwrok Segmentation and kNN Acceleration for Mobile Robots [paper]
- Author: Jueun Jung, Seungbin Kim, Bokyoung Seo, Wuyoung Jang, Sangho Lee, Jeongmin Shin, Donghyeon Han, and Kyuho Jason Lee
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 27) 2024
42. [ISCAS 2024] A 422.1 Mpixels/J Tile-Based 4K Super Resolution Processor with Variable Bit Compression [paper]
- Author: Wuyoung Jang, Sangho Lee, Jinhoon Jo, Jueun Jung, Donghyeon Han, and Kyuho Lee
- IEEE International Symposium on Circuits and Systems 2024
41. [ISSCC 2024] Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing [paper]
- Author: Gwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2024
40. [ISSCC 2024] NeuGPU: A 18.5 mJ/iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time-Rendering with Segmented-Hashing Architecture [paper]
- Author: Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2024
39. [ISSCC 2024] LSPU: A Fully-Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-level kNN Acceleration [paper]
- Author: Jueun Jung, Seungbin Kim, Bokyoung Seo, Wuyoung Jang, Sangho Lee, Jeongmin Shin, Donghyeon Han, and Kyuho Jason Lee
- IEEE International Solid-State Circuits Conference 2024
38. [A-SSCC 2023] A 33.58 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device [paper]
- Author: Jongjun Park, Donghyeon Han, Junha Ryu, Dongseok Im, Gwangtae Park, and Hoi-jun Yoo
- IEEE Asian Solid-State Circuits Conference 2023
37. [S. VLSI 2023] NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices [paper]
- Author: Wooyoung Jo, Sangjin Kim, Juhyoung Lee, Donghyeon Han, Sangyeob Kim, Seungyoon Choi and Hoi-Jun Yoo
- Symposium on VLSI Circuits 2023
36. [S. VLSI 2023] GPPU: A 330.4-µJ/task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation [paper]
- Author: Seokchan Song, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Gwangtae Park and Hoi-Jun Yoo
- Symposium on VLSI Circuits 2023
35. [CoolChips 2023*] A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration [paper]
- Author: Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 26) 2023
34. [CoolChips 2023] COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation [paper]
- Author: Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 26) 2023
33. [ISSCC 2023*] MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices [paper]
- Author: Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2023
32. [ISSCC 2023] C-DNN: A 24.5-to-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-based Sparsity Generation [paper]
- Author: Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2023
31. [ISSCC 2023] DynaPlasia: An eDRAM In-Memory-Computing-based Reconfigurable Spatial Accelerator with Triple-mode Cell for Dynamic Resource Switching [paper]
- Author: Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2023
30. [HotChips 2022] An Energy-efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache Subsystem [paper]
- Author: Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2022
29. [HotChips 2022] DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip [paper]
- Author: Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2022
28. [HotChips 2022*] HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Mobile Devices [paper]
- Author: Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2022
27. [AICAS 2022*] A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation [paper] [Best Demonstration & Best Paper]
- Author: Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo
- IEEE International Conference on Artificial Intelligence Circuits and Systems 2022
26. [CoolChips 2022] A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms [paper]
- Author: Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 25) 2022
25. [ISCAS 2022] A 49.5 mW Multi-scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection [paper]
- Author: Seokchan Song, Soyeon Kim, Gwangtae Park, Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2022
24. [ISCAS 2022] A 36.2 dB High SNR and PVT/Leakage-robust eDRAM Computing-In-Memory Macro with Segmented BL and Reference Cell Array [paper]
- Author: Sangwoo Ha, Sangjin Kim, Donghyeon Han, Soyeon Um, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2022
23. [CICC 2022] An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache [paper] [Best Paper]
- Author: Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo
- IEEE Custom Integrated Circuits Conference 2022
22. [ISSCC 2022] DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms [paper]
- Author: Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2022
21. [A-SSCC 2021] FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling [paper]
- Author: Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, Hoi-Jun Yoo
- IEEE Asian Solid-State Circuits Conference 2021
20. [HotChips 2021] OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data [paper]
- Author: Juhyoung Lee, Sangyeob Kim, Jihoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2021
19. [HotChips 2021] An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory [paper]
- Author: Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2021
18. [AICAS 2021] Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems [paper]
- Author: Juhyoung Lee, Changhyeon Kim, Donghyeon Han, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo
- IEEE International Conference on Artificial Intelligence Circuits and Systems, Jun 2021
17. [S. VLSI 2021] OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dual-mode Weight Compression and On-chip Sparse Weight Transposer [paper]
- Author: Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee and Hoi-Jun Yoo
- Symposium on VLSI Circuits 2021
16. [CoolChips 2021*] An Energy-efficient Deep Neural Network Training Processor with Bit-slice-level Reconfigurability and Sparsity Exploitation [paper]
- Author: Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo
- IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 24) 2021
15. [ISCAS 2021] A 64.1mW Accurate Real-time Visual Object Tracking Processor with Spatial Early Stopping on Siamese Network [paper] [Best Paper]
- Author: Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2021
14. [A-SSCC 2020] An Energy-Efficient GAN Accelerator with On-chip Training for Domain-Specific Optimization [paper] [Best Design]
- Author: Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangyeob Kim, Sangjin Kim, and Hoi-jun Yoo
- IEEE Asian Solid-State Circuits Conference 2020
13. [A-SSCC 2020] A 1.02-μW STT-MRAM-Based DNN ECG Arrhythmia Monitoring SoC With Leakage-Based Delay MAC Unit [paper]
- Author: Kyoung-Rog Lee, Jihoon Kim, Changhyeon Kim, Donghyeon Han, Juhyoung Lee, Jinsu Lee, Hongsik Jeong, and Hoi-Jun Yoo
- IEEE Asian Solid-State Circuits Conference 2020
12. [ISICAS 2020] A 1.15 TOPS/W Energy-efficient Capsule Network Accelerator for Real-time 3D Point Cloud Segmentation in Mobile Environment [paper]
- Author: Gwangtae Park, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo
- IEEE Symposium on Integrated Circuits and Systems 2020
11. [HotChips 2020] GANPU: A Versatile Many-Core Processor for Training GAN on Mobile Devices with Speculative Dual-Sparsity Exploitation
- Author: Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2020
10. [S. VLSI 2020] A 4.45 ms Low-latency 3D Point-cloud based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices [paper]
- Author: Dongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, and Hoi-Jun Yoo
- Symposium on VLSI Circuits 2020
9. [ISCAS 2020] A 0.22-0.89mW Low-Power and Highly-Secure Always-on Face Recognition Processor with Adversarial Attack Prevention [paper]
- Author: Youngwoo Kim, Donghyeon Han, Changhyeon Kim, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2020
8. [ISSCC 2020] 7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation [paper]
- Author: Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2020
7. [ICCVW 2019*] Efficient Convolutional Neural Network Training with Direct Feedback Alignment [preprint] [paper]
- Author: Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Conference on Computer Vision 2019
6. [HotChips 2019] LNPU: An Energy-Efficient Deep-Neural-Network Training Processor with Fine-Grained Mixed Precision
- Author: Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, and Hoi-Jun Yoo
- IEEE Hot Chips: A Symposium on High Performance Chips 2019
5. [S. VLSI 2019*] A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture [paper]
- Author: Donghyeon Han, Jinsu Lee, Jinmook Lee, and Hoi-Jun Yoo
- Symposium on VLSI Circuits 2019
4. [ISCAS 2019] DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices [paper]
- Author: Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2019
3. [AICAS 2019] CNNP-v2:An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture [paper] [Best Paper]
- Author: Sungpill Choi, Kyeongryeol Bong, Donghyeon Han, and Hoi-Jun Yoo
- IEEE International Conference on Artificial Intelligence Circuits and Systems, Mar 2019
2. [ISSCC 2019] 7.7 LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16 [paper] [Best Demonstration]
- Author: Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, and Hoi-Jun Yoo
- IEEE International Solid-State Circuits Conference 2019
1. [ISCAS 2018*] A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices [paper]
- Author: Donghyeon Han, Jinsu Lee, Jinmook Lee, Sungpill Choi, and Hoi-Jun Yoo
- IEEE International Symposium on Circuits and Systems 2018