NEWS
[Feb, 2025] "MEGA.mini: A Universal Generative AI Processor with a New Big/Little Core Architecture for NPU" is accepted by IEEE International Solid-State Circuits Conference (ISSCC).
[Sep, 2024] D. Han is now working as an assistant professor at Chung-ang University.
[Feb, 2024] D. Han won the Best Demo Award for the paper "MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices" at the ISSCC 2024.
[Dec, 2023] "A Low-power AI-based 3D Rendering Processor with Hybrid DNN Computing" is accepted by IEEE Micro.
[Aug, 2023] A book, "On-Chip Training NPU - Algorithm, Architecture and SoC Design" is published.
[Jul, 2021] "MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing" is accepted by IEEE Journal of Solid-State Circuits (JSSC).
[Apr, 2023] Dataset for MetaVRain Project is now released in Github. (https://github.com/DonghyeonHan/MetaVRain_dataset).
[Apr, 2023] "A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration" is accepted by IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOLChips).
[Mar, 2023] D. Han is now working as a postdoctoral associate at MIT.
[Feb, 2023] D. Han won the Bronze Prize for the paper "MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices" at the 29th SAMSUNG Humantech Paper Award.
[Feb, 2023] "MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices" is accepted by IEEE International Solid-State Circuits Conference (ISSCC).
[Feb, 2023] D. Han won the Award of Ph.D. Students with Excellent Research Performance in Electrical Engineering, KAIST.
[Jan, 2023] D. Han gave an invited talk entitled "A Real-time DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation" at the Electronic & Information Research Information Center, Korea.
[Nov, 2022] "Energy-efficient DNN Training Processors on Micro-AI Systems" is accepted by IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS).
[Aug, 2022] "HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Moble Devices" is accepted by IEEE Hot Chips: A Symposium on High Performance Chips (HotChips).
[Jun, 2022] D. Han won the Best Live Demo Award at 2022 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2022).
[Jun, 2022] D. Han won the Best Paper Award at 2022 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2022).
[Jun, 2022] "A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation" is accepted by IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS).
[Mar, 2022] "A Mobile DNN Training Processor with Automatic Bit-precision Search and Fine-grained Sparsity Exploitation" is accepted by IEEE Micro.
[Apr, 2021] "An Energy-efficient Deep Neural Network Training Processor with Bit-slice-level Reconfigurability and Sparsity Exploitation" is accepted by IEEE Symposium in Low-Power and High-Speed Chips (COOLChips).
[Sep, 2021] "HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-point and Active Bit-precision Searching" is accepted by IEEE Journal of Solid-State Circuits (JSSC).
[Dec, 2020] "DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning" is accepted by IEEE Journal of Solid-State Circuits (JSSC).
[Feb, 2020] D. Han won the Gold Prize for the paper "GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual Sparsity Exploitation" at the 26th SAMSUNG Humantech Paper Award.
[Nov, 2019] "Efficient Convolutional Neural Network Training with Direct Feedback Alignment" is accepted by IEEE International Conference on Computer Vision Workshop (ICCVW).
[Jun, 2019] "A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture" is accepted by Symposium on VLSI Circuits (SoVC).
[Feb, 2019] D. Han won the Participation Prize for the paper "LNPU: A Sparse Deep-Neural-Network Learning Processor with Fine-grained Mixed Precision of FP8-FP16" at the 25th SAMSUNG Humantech Paper Award.
[Nov, 2018] "A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application" is accepted by IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).
[Sep, 2018] D. Han won the KAIST Electrical Engineering Best Teaching Assistant Award.
[May, 2018] "A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices" is accepted by IEEE International Symposium on Circuits and Systems (ISCAS).
[Feb, 2016] D. Han received 16’ Korea Electric Power Corporation (KEPCO) Scholarship for Electric Engineering Student.
[Mar, 2014] D. Han received Dean's List in Recognition of Outstanding Scholastic Achievement (Electrical Engineering, KAIST).
1st Author Conference: 7 Papers (Until Feb, 2023)
1st Author Journal: 5 Papers (Until Feb, 2023)